臺灣博碩士論文加值系統

本論文包含兩個主題。第一個主題是雙迴路控制低壓降電壓調整器；第二個主題是平均電流控制降壓轉換器。以上兩者皆可應用在消費性電子產品。
本論文的第一個部份，由於可攜式電子產品的成長，低壓降電壓調整器的需求日益增加。我們提出了一個使用雙迴路回授控制、無輸出電容且擁有快速暫態響應的低壓降電壓調整器。此方法為提出運算轉阻放大器使得暫態響應可以比其它利用傳統回授路徑的低壓降電壓調整器還要快。尤其是，提出之低壓降電壓調整器不需要輸出電容且顯示其效能非常好，穩定時間為0.3μs。此穩壓器在輸入電源為1.5V時，可以提供一個1.2V的輸出電壓。此晶片是以台積電點三五微米兩層多晶矽四層金屬互補式金屬氧化物半導體製程來實現。晶片面積只需360μm x 345μm。
本論文的第二個部分，提出一個運用平均電流控制機制取代傳統斜率補償的新型降壓電路。由於所提出的電流感測電路不僅可以全時間感測電感電流和控制降壓電路，而且結構簡單、只用到極少的元件，故在設計上十分容易。而所採用的平均電流控制機制在工作週期(Duty Cycle)超過50%時，既使不使用斜率補償亦可有效防止電路產生次諧波震盪(Sub-Harmonic Oscillation)的問題。本電路使用的是台積電點三五微米兩層多晶矽四層金屬互補式金屬氧化物半導體製程，晶片面積為1.354μm x 1.35μm。

This thesis includes two research topics. The first topic is a Low-Dropout Voltage Regulator with Dual-Loop Controlled Paths. The second one is an Average-Current-Controlled Buck Converter. Both of the circuits can be applied to consumer electronics.
In the first part of this thesis, the demand for low-dropout voltage regulator (LDO) is increasing for the growth of portable electronics. We present a capacitor-free LDO with fast transient response using dual-loop feedback paths. This technique based on the proposed trans-impedance amplifier helps the transient response to be faster than other LDOs with the traditional feedback path. Particularly, the performance of proposed LDO shows the settling time of 0.3μs is excellent without off-chip capacitor. The regulator provides a 1.2V of output voltage at input voltage of 1.5V. The prototype of the LDO is fabricated with TSMC 0.35μm 2P4M CMOS processes. The active area is only 360μm x 345μm.
In the second part of this thesis, we present an integrated buck converter using average-current-controlled (ACC) techniques without slope compensation. The proposed current sensing circuit is very simple and only consists of few components, which can be designed easily. The designed buck converter using the current sensing circuit and ACC techniques can be stable even if the duty cycle is greater than 50%. The buck converter is implemented with TSMC 0.35μm CMOS 2P4M processes, and the chip area is 1.354μm x 1.35μm.

摘要 i
ABSTRACT ii
誌謝 iv
目錄 v
圖目錄 viii
表目錄 xiv
第一章 緒論 1
1.1 相關研究發展現況 1
1.2 研究動機與目的 4
1.3 論文架構 8
第二章 直流-直流轉換器操作原理 9
2.1 低壓降電壓調整器操作原理 9
2.1.1 導通元件的選用 10
2.1.2 輸入輸出電壓差(Dropout Voltage) 12
2.2 切換式降壓轉換器操作原理 13
2.2.1 連續導通模式之穩態分析 15
2.2.2 不連續導通模式之穩態分析 21
2.2.3 連續與不連續導通模式之邊界條件 25
2.3 直流-直流轉換器之規格與定義 26
2.3.1 暫態響應(Transient Response) 26
2.3.2 線性調節率(Line Regulation) 29
2.3.3 負載調節率(Load Regulation) 30
2.3.4 輸出電壓漣波(Output Voltage Ripple) 31
2.3.5 效率(Efficiency) 32
2.3.6 電源拒斥比(Power Supply Rejection Ratio) 33
2.3.7 靜態電流(Quiescent Current) 34
第三章 雙迴路控制低壓降電壓調整器之設計與實現 36
3.1 運算轉導放大器 37
3.2 運算轉阻放大器 39
3.3 輸出結構 41
3.4 雙迴路控制低壓降電壓調整器 44
3.5 穩定度與小訊號討論 46
3.6 整體電路之模擬結果 50
3.6.1 電路佈局前模擬(Pre-Layout Simulation) 50
3.6.2 電路佈局後模擬(Post-Layout Simulation) 55
3.7 整體電路之佈局與實測結果 60
3.7.1 整體電路佈局圖 60
3.7.2 量測環境 63
3.7.3 量測結果 64
第四章 平均電流控制降壓轉換器之設計與實現 71
4.1 回授補償電路 71
4.2 主動式電流感測電路 78
4.3 平均電流控制電路 80
4.4 鋸齒波產生器 83
4.5 非重疊電路 84
4.6 驅動電路 86
4.7 整體電路之模擬結果 87
4.7.1 電路佈局前模擬(Pre-Layout Simulation) 87
4.7.2 電路佈局後模擬(Post-Layout Simulation) 98
4.8 整體電路之佈局與實測結果 103
4.8.1 整體電路佈局圖 103
4.8.2 量測環境 105
4.8.3 量測結果 105
第五章 結論與未來展望 115
5.1 結論 115
5.2 未來展望 116
參考文獻 117

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