臺灣博碩士論文加值系統

本論文提出Ku-Band低軌道衛星聯網地面接收機之研製，使用TSMC 0.18μm 1P6M CMOS製程實現，應用於Ku-Band之低雜訊放大器及混頻器之設計。本低雜訊放大器設計在10.7~12.7GHz之頻段，並透過國家晶片系統設計中心(CIC)之協助完成晶片之製作。對於寬頻之輸入匹配，本論文以CG方式作為RF輸入匹配電路。中間級利用電感的疊接放大器，在整個頻段中，可以獲得較佳的增益平坦度。最後以一緩衝器做輸出端匹配。本混頻器提出使用CG之匹配網路作為雙輸入，設計在10.7~12.7GHz頻段之混頻器，因使用單一電感作為匹配，因此可以縮小晶片面積。
此外也使用Win 0.15μm pHEMT GaAs製程設計出Ku-Band低雜訊放大器。利用單一電晶體來設計，經模擬結果，其操作再10.7~12.7GHz，輸入輸出反射損耗皆小於-10dB，增益落在10.8±0.5dB，雜訊指數為0.52~0.54，在100MHz到14GHz的頻段內，穩定係數皆符合K>1且Δ<1。

This thesis is proposed for the developments of Ku-Band low earth Orbit Satellite Ground Receiver for Internet Broadband Applications. We use TSMC 0.18μm 1P6M CMOS process to design Ku-Band low noise amplifier and mixer. The low noise amplifier is designed in the band of 10.7~12.7GHz, and completed wafer fabrication with the assistance of the National Chip System Design Center (CIC). For broadband input matching, the first stage of LNA used CG as the RF input matching circuit to achieve low noise figure. In the second stage we used the shunt inductor amplifier to get better gain flatness over the entire frequency band. The last stage, we design a buffer amplifier for output matching. The proposed mixer used a CG matching network with balanced input. This mixer is designed in the frequency band of 10.7-12.7 GHz. Because only a single inductor is used for the matching circuit, the chip area can be reduced.
In addition, Ku-Band low noise amplifiers were also designed by using the Win 0.15μm pHEMT GaAs process. The input and output reflection loss are less than -10dB, the gain is about 10.8 ± 0.5dB, the noise figure is about 0.52 ~ 0.54dB, and the stability factors K>1 and Δ<1 within the frequency band of 100MHz-14GHz.

致謝 iv
目錄 v
圖目錄 vii
表目錄 xi
第一章、緒論 1
1.1 研究背景 1
1.2 研究動機 2
1.3 章節概述 5
第二章、接收機系統架構[3][4] 6
2.1簡介 6
2.2 接收機基本概念 7
2.3超外差接收機架構 9
2.3.1 鏡像頻率之影響 10
2.3.2 半中頻的影響 12
2.3.3 中頻頻率之選擇 13
2.3.4 雙中頻架構 15
2.4 鏡像消除接收機架構 17
2.4.1 Hartley架構 18
2.4.2 Weaver架構 22
2.5 直接降頻接收機架構 23
2.5.1 直流偏移 24
2.5.2 本地振盪訊號洩漏 25
2.5.3 I/Q信號的不匹配 26
2.5.4 偶次階失真 27
2.6 數位中頻接收機 28
第三章、CMOS Ku-Band低雜訊放大器之研製 30
3.1 簡介 30
3.2 低雜訊放大器基本參數[6] 31
3.2.1 增益與增益平坦度 31
3.2.2 雜訊源 33
3.2.3 雜訊指數(Noise Figure) 35
3.3 CMOS Ku-Band低雜訊放大器(I)電路設計 37
3.3.1電路架構介紹 37
3.3.2設計原理 38
3.3.3 CMOS Ku-Band低雜訊放大器(I)之模擬與量測 40
3.4 CMOS Ku-Band低雜訊放大器(II)之電路設計 46
3.4.1電路架構介紹 46
3.4.2CMOS Ku-Band低雜訊放大器(II)之模擬與量測 47
3.5 CMOS Ku-Band低雜訊放大器(III)之電路設計 53
3.5.1電路架構介紹 53
3.5.2CMOS Ku-Band低雜訊放大器(III)之模擬 54
第四章、GaAs Ku-Band低雜訊放大器設計 58
4.1簡介 58
4.2 GaAs Ku-Band低雜訊放大器電路架構 59
4.3 GaAs Ku-Band低雜訊放大器之模擬 63
第五章、CMOS Ku band混頻器 67
5.1簡介 67
5.2 混頻器概論 68
5.2.1主動式混頻器[13] 69
5.2.2 被動式混頻器 73
5.3 混頻器之規格參數[3] 74
5.3.1轉換增益損耗 74
5.3.2 雜訊指數 75
5.3.3 隔離度 76
5.4 CMOS Ku-Band混頻器設計 78
5.5 CMOS Ku-Band混頻器之模擬 80
第六章、結論 84
Curriculum VITA 86
參考文獻 87

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[2] http://pansci.asia/archives/117686

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[14] Md. Rafiqul Islam; A. H. M. Zahirul Alam; Sheroz Khan; Arafat A. A Shabana, " Design of a low noise amplifier with GaAs MESFET at ku_Band ," in Computer and Communication Engineering (ICCCE), International Conference, pp.1-5, August. 2010

[15] 蘇柏綱﹐ “WLAN/WiMAX雙模接收機進頻器之研製” 碩士論文﹐元智大學﹐通訊工程學系﹐2007

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