臺灣博碩士論文加值系統

本論文描述一個操作於2.16GHz的功率放大器。功率放大器的製作是使用台灣積體電路公司的0.35um 2P4M CMOS製程。功率放大器的架構是一個兩級的電路，並採用self-biased的架構來減低崩潰電壓對電晶體的影響，偏壓點設計操作在class-AB。另外，本論文描述了溫度變化對於一注入鎖定式環形振盪器的影響，溫度變化範圍為25℃～100℃。使用的模擬軟體為Cadence Spectre RF以及Agilent Advanced Design System (ADS)。

This thesis describes the design of a 2.16GHz CMOS power amplifier (PA). The PA circuit is fabricated by using TSMC 0.35um 2P4M CMOS technology. The framework of the PA is formed with a two-stage circuit, and use self-biased topology to reduce breakdown voltage effect on transistors. The PA operated in class-AB. The thesis also tells the effects of temperature on an injection-locked ring oscillator. The temperature variation range is 25℃~100℃. The simulation tool are Cadence Spectre RF and Agilent ADS.

Abstract (Chinese)..............................................................................................................i
Abstract (English)..............................................................................................................ii
Acknowledgement (Chinese)...........................................................................................iii
Contents iv
List of Figures and Tables vi
Chapter 1 Introduction 1
Chapter 2 CMOS Voltage-Controlled Oscillator 2
2.1 Oscillator Theory 2
2.2 Parameters of VCO 4
2.2.1 Center Frequency 4
2.2.2 Tuning Range 5
2.2.3 Tuning Linearity 6
2.2.4 Output Amplitude 6
2.2.5 Power Dissipation 7
2.2.6 Supply and Common-Mode Rejection 7
2.3 Phase Noise 7
2.4 LC Oscillators 11
2.4.1 Colpitts Oscillator 13
Chapter 3 Temperature on VCO 18
3.1 MOSFETs 18
3.1.1 Threshold Voltage 18
3.1.2 Average Effective Mobility 19
3.1.3 Zero-Temperature-Coefficient Bias Points 19
3.1.4 Leakage Currents 20
3.1.5 MOSFET High Temperature Small Signal Model 21
3.2 Injection-Locked Oscillator 22
3.3 Measurement Results 23
3.3.1 LC-VCO 23
3.3.2 Injection-Locked Ring Oscillator 24
Chapter 4 Microwave Amplifier Concept 32
4.1 S-Parameters 32
4.2 Power Gain Equations 34
4.3 Stability Considerations 36
Chapter 5 CMOS Power Amplifier Theory 41
5.1 Power Amplifier Introduction 41
5.2 Amplifier Parameter Definitions 43
5.2.1 Input and Output VSWR 43
5.2.2 Power Gain 44
5.2.3 Output Power 44
5.2.4 PAE 45
5.2.5 Intermodulation Distortion 45
5.3 Classification of PAs 49
5.3.1 Class A 49
5.3.2 Class B 51
5.3.3 Class AB 53
5.3.4 Class C 53
5.3.5 Class D 55
5.3.6 Class E 58
5.3.7 Class F 60
5.3.8 Summary of PAs Classification 61
5.4 Matching Networks Design 61
5.4.1 Lowpass Matching Networks 61
5.4.2 Transmission Line Matching 63
5.4.3 Shorting the Harmonics 64
5.5 Design of Power Amplifier 65
5.5.1 Self-Biased Cascode Topology 65
5.5.2 Decision of the Transistor’s Size of Power Stage 67
5.5.3 The Two Stage PA 68
5.5.4 Design of Matching Network 69
5.6 Simulation and Measurement Results of PA 71
Chapter 6 Conclusion 76
References 77

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