臺灣博碩士論文加值系統

本論文之研究目標為定頻之快速暫態響應穩壓器。依據控制方式可分為兩部分：
第一部為快速暫態響應之電流模式控制切換式降壓轉換器，藉由系統的設計與流程，包含系統模型、補償器設計、電晶體層次設計、晶片下線，將電流模式穩壓器的迴路特性優化，以達到較好的暫態響應。量測結果證明在輸入電壓於2.7~4.2V的鋰電池供電範圍內，在200mA~500mA負載電流範圍內，此轉換器可以穩定的提供1.8V的輸出電壓，暫態響應最快只需10us，最高轉換效率為93%。而藉由頻域的量測，也證明了本設計與分析流程的正確性，同時證明系統的穩定性。本電流模式控制降壓轉換器使用TSMC 0.35μm CMOS製程進行設計，外接電感與輸出電容分別為4.7μH與10uF。
本論文第二部分提出一具有快速暫態響應、寬負載電流範圍、近似V2之定頻遲滯控制切換式降壓穩壓器。此穩壓器使用鎖相迴路，藉由所提出之二級視窗控制電路來改善非線性控制不定頻的缺點，使其在重載時系統可以定頻操作。在極輕載時為維持轉換效率，本系統可自動進入PFM模式操作。本論文使用的近似V2之架構，可以不需要依靠輸出電容ESR即可取得與電感電流同相之訊號，可使用小ESR的電容降低輸出漣波。本轉換器使用TSMC 0.35μm CMOS製程進行設計與製作，外接電感與輸出電容分別為2.2μH與10μF，量測結果顯示在輸入電壓3.3V~3.9V、負載電流為18mA~700mA的範圍內，可以提供穩定之輸出電壓1.2V，暫態響應小於5us，最高轉換效率為95.6%。

This thesis is about the fixed-frequency fast-transient regulator. Based on control methods, the thesis can be divided into two parts:
The first part focuses on the fast transient current-mode controlled buck converter. Through the systematic design procedure and analysis including the system modeling, compensator design, transistor level design, and chip implementation, the loop response is improved for better dynamic response. The design procedure is verified by the chip’s measurement results. The measurement results show that this converter can operate with load current from 200mA to 500mA in a supply voltage from 2.7 to 4.2V and the output voltage of 1.8V. The recovery time is about 10us and the highest efficiency is 93%. By the frequency domain measurement, the stability of proposed buck converter can be guaranteed. This converter is designed and fabricated with TSMC 2P4M 0.35μm CMOS process. The off chip inductor and the output capacitor are 4.7μH and 10μF.
In the second part of this thesis, a fast transient quasi-V2 fixed-frequency hysteretic buck converter with wide load current range is proposed. This converter uses the phase-locked loop through the proposed Two Stage Window Control Circuit to stabilize the switching frequency. Under ultra-light load condition, this converter operates in PFM mode to reduce the switching loss and improve the light load efficiency. By the quasi-V2 technique, the inductor current information can be obtained without relying on large ESR of output capacitor to reduce the output ripple. This converter has been designed and fabricated by TSMC 2P4M 0.35μm CMOS process. The off chip inductor and the output capacitor are 2.2μH and 10uF. The measurement results show that this converter can operate with load current from 18mA-700mA in a supply voltage from 3.3-3.9V, and the output voltage of 1.2V. With the PLL, the switching frequency is maintained constant at 1MHz. The transient response time is about 5us and the highest efficiency is 95.6%.

口試委員會審定書 ii
中文摘要 iv
ABSTRACT v
致謝 vii
CONTENTS viii
LIST OF FIGURES xiii
LIST OF TABLES xviii
Chapter 1 Introduction 1
1.1 Background and Motivation 1
1.2 Challenges and Objectives 3
1.3 Thesis Organization 4
Chapter 2 Current-Mode Buck Converter Fundamentals 6
2.1 Operation Principle 6
2.1.1 PWM Operation 6
2.1.2 PFM Operation 9
2.2 Small Signal Model and Analysis 10
2.2.1 Current Loop 11
2.2.2 Voltage Loop 15
2.3 Compensation Techniques 18
2.3.1 Off-Chip Compensation 19
2.3.2 On-Chip Compensation 21
2.3.3 Adaptive Compensation 22
2.4 Related Research Topics 23
2.4.1 Current Sensor 24
2.4.2 High Efficiency 25
2.4.3 Fast Transient Response 26
2.4.4 Others 28
Chapter 3 Ripple-Based Buck Converter Fundamentals 29
3.1 Operation Principle 29
3.2 Ripple-Based Control Classification 31
3.2.1 Voltage-Mode Hysteretic Control 32
3.2.2 Current-Mode Hysteretic Control 37
3.2.3 Constant On-time Control 38
3.2.4 V2 Control 41
3.2.5 Comparison and Discussion 46
3.3 Problems and Solutions 47
3.3.1 Large ESR Requirement 47
3.3.2 Regulation Enhancement 51
3.3.3 Switching Frequency Variation 52
Chapter 4 Ripple-Based Buck Converters with Switching Frequency Stabilization Capability 53
4.1 Quasi-fixed Frequency Constant On-time Buck Converter 53
4.1.1 Input/Output Voltage Independent 55
4.1.2 Load Current Independent 57
4.1.3 Recent Research Review 59
4.2 Fixed Frequency Hysteretic Buck Converter 62
4.2.1 Hysteretic Window Adjustment 63
4.2.2 Loop Delay Adjustment 65
4.2.3 Recent Research Review 66
4.3 Fundamentals of PLL [76] 72
4.3.1 Operation Principle 72
4.3.2 Analysis and System Modelling 73
Chapter 5 Fast Transient Current-Mode DC-DC Converter with Improved Loop Response 77
5.1 Introduction 77
5.2 System Architecture and Proposed Techniques 78
5.2.1 Methodology for Improved Loop Response 79
5.2.2 Compensator Design 80
5.2.3 Specifications and Verification 82
5.3 Circuit Design 84
5.3.1 OTA 84
5.3.2 Current Sensor 84
5.3.3 Oscillator 85
5.3.4 SUM 86
5.3.5 Comparator 86
5.3.6 Drivers 87
5.3.7 Power MOS transistor 88
5.3.8 Soft-start 88
5.4 Implementation and Measurement Considerations 89
5.4.1 IC Layout and PCB Design 89
5.4.2 Measurement Setup and Test Plan 91
5.5 Experimental Results 91
5.5.1 Steady-state Measurement 91
5.5.2 Transient Response Measurement 92
5.5.3 Efficiency Measurement 93
5.5.4 Loop Response Measurement 93
5.6 Comparison and Discussion 94
5.7 Summary 96
Chapter 6 Fixed Frequency Quasi-V2 Hysteretic Buck Converter with PLL-Based Control 97
6.1 Introduction 97
6.2 Research Overview 98
6.2.1 Hysteretic Buck 98
6.2.2 Fixed-Frequency Hysteretic Buck 99
6.2.3 Conventional V2 Buck 101
6.2.4 Quasi-V2 Hysteretic Buck 102
6.3 System Architecture and Proposed Techniques 103
6.3.1 Control Loop Analysis 105
6.3.2 Phase Locked Loop Design 107
6.3.3 Specifications and Verification 108
6.4 Circuit Design 110
6.4.1 Two Stage Window Control Circuit 110
6.4.2 Compensator 111
6.4.3 Phase Frequency Detector 112
6.4.4 Charge Pump and Low Pass Filter 114
6.4.5 Mode Selector 116
6.5 Implementation and Measurement Considerations 116
6.5.1 IC Layout and PCB Design. 116
6.5.2 Measurement Setup and Test Plan 119
6.6 Experimental Results 120
6.6.1 Steady-state Measurement 120
6.6.2 Transient Response Measurement 122
6.6.3 Efficiency Measurement 124
6.6.4 Frequency Measurement 124
6.7 Comparison and Discussion 126
6.8 Summary 128
Chapter 7 Conclusions 129
7.1 Thesis Summary and Contribution 129
7.2 Future Work 130
REFERENCE 132

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