臺灣博碩士論文加值系統

隨著科技產業的演進，應用在電視、電腦螢幕、手機上的液晶顯示器(Liquid Crystal Display, LCD)已經扮演著非常重要的角色。近年來，智慧行動裝置蓬勃發展，在行動裝置的顯示技術上逐漸追求更細緻的畫面呈現，與更大的顯示畫面，為了實現這樣的需求，市場逐漸聚焦於「高解析度」、「窄邊框」等關鍵技術在平面顯示器的應用。
將面板驅動系統中的閘極驅動電路(gate driver)製程整合在面板周邊的「閘極驅動電路陣列技術」，已成為目前液晶顯示器技術發展的趨勢。閘極驅動電路的基本原理是提供序列式的方波訊號來打開畫素內的開關元件，進而使得資料驅動電路(Data Driver)輸送電壓資料到相對應的畫素電容裡，產生一連串的連續畫面。在傳統的顯示面板中，閘極驅動IC晶片(由單晶矽晶圓製程所製造)必須透過封裝與顯示基板進行貼合,此封裝貼合過程必須使用金屬線作連接，而這些金屬線會增加繞線的困難度，以及金屬貼合時所產生的誤差，造成製作面板良率的下降。而GOA (Gate driver On Array)的技術，就是在此時因蘊而生。GOA技術將傳統面板側邊的閘極驅動電路移除，改為製作到面板的玻璃基板上，此方式的好處為有效的縮減面板側邊所需的寬度、減少IC的使用數量可以降低成本，也減少金屬繞線所產生的製程誤差。
本論文提出二種可應用於高解析度(FHD)液晶顯示器的閘極驅動電路陣列技術，都具備雙向傳輸功能以因應智慧型電子裝置在不同方向的畫面呈現。第一種為適用在中大尺寸窄邊框顯示器的閘極驅動電路，使用交流驅動反相器(AC-driven Inverter)搭配節點共用(Node Sharing)機制，設計出具備全時段 (Full Time Noise-free)雜訊抑制機制的閘極驅動電路。除此之外，此電路在四相時序訊號的操作中實現單一充放電路徑(Single Path Condition)、無電容(Capacitor-free)設計與驅動時脈同步控制裝置(Driving Clock Controlled Device)來節省元件數量，達到窄邊框的目的。第二種為適用在小尺寸極窄邊框顯示器的閘極驅動電路，同樣使用節點共用(Node Sharing)機制節省元件數量，並提出更精簡的抑制雜訊架構(Clock Controlled Noise-free Structure)來達到極窄邊框的目標。

Over the last decade or more, high resolution and narrow-bezel liquid crystal display became the main stream in active-matrix liquid crystal display (AMLCD) technology. However, higher resolution means more pixels in the panel, which lead to more gate driver ICs requirement. The routing between the gate driver ICs and the panel would block the development in narrow bezel display. In order to overcome this issue, the integrated gate driver circuit on glass substrate is invented to replace the function of conventional gate driver ICs, called gate driver on array (GOA). Hydrogenated amorphous silicon thin film transistors (a-Si:H TFTs) are used to design the GOA circuit in this work. The reason why a-Si:H TFTs are chosen is described as follow: (1) Low-temperature process (<350℃) would achieves the destiny of cost reduction. (2) High uniformity of amorphous silicon thin film transistors in active layer assure the quality of the fabricated panel.
This thesis proposes two kinds of bi-directional transmissible gate drivers for different a-Si:H TFT LCD application. First one is for medium-large size flat panel application, which utilized alternatively operated “AC-driven inverter” for full time noise-free in non-working state. Using four phase clock signals for single path condition. Employing “driving clock controlled device” and “capacitor-free design” for less devices, “Node sharing mechanism” for area reduction. The second gate driver is for small size flat panel application, “clock controlled noise-free structure” further eliminate the devices, and the concise design successfully reduces the border of the gate driver to 0.95mm.

Contents

摘 要 iii
Abstract v
Acknowledgement vii
Contents ix
Figure Captions xi
Table Captions xiv

CHAPTER 1 INTRODUCTION 1
1.1 OVERVIEW OF LIQUID CRYSTAL DISPLAYS (LCDS) 1
1.2 MOTIVATION 9
1.3 THESIS ORGANIZATION 13
CHAPTER 2 EXPERIMENTAL PROCEDURES 14
2.1 EXPERIMENT FLOW 14
2.2 MANUFACTURE AND MEASUREMENT METHOD OF A-SI TFTS 16
2.2.1 Process of Amorphous Silicon TFTs 16
2.2.2 Parameter Extraction Methods 19
2.2.3 Parasitic Capacitance of Amorphous Silicon TFTs 22
2.2.4 Layout Optimization 25
CHAPTER 3 DEVICE CHARACTERISTIC AND MODEL OF A-SI TFTS 30
3.1 TRANSFER AND OUTPUT CHARACTERISTICS OF A-SI TFTS 30
3.2 UNIFORMITY OF A-SI TFTS MANUFACTURED ON GLASS 33
3.3 MODELS OF A-SI TFTS IN HSPICE 36
CHAPTER 4 BI-DIRECTION TRANSMISSIBLE GATE DRIVER FOR MEDIUM-LARGE SIZE PANEL APPLICATION 39
4.1 PRIOR ARTS DISCUSSION AND DESIGN CONSIDERATION 39
4.2 GATE DRIVER FOR MEDIUM-LARGE SIZE PANEL APPLICATION 44
4.2.1 Circuit Schematic and Operation 44
4.2.2 Simulation Results and Analysis 57
4.2.3 Measurement Results Discussion 64
4.3 SUMMARY 67
CHAPTER 5 BI-DIRECTION TRANSMISSIBLE GATE DRIVER FOR SMALL SIZE PANEL APPLICATION 68
5.1 PRIOR ARTS DISCUSSION AND DESIGN CONSIDERATION 68
5.2 GATE DRIVER FOR SMALL SIZE PANEL APPLICATION 70
5.2.1 Circuit Schematic and Operation 70
5.2.2 Simulation Results and Analysis 75
5.2.3 Measurement Results Discussion 82
5.3 REDESIGN OF GATE DRIVER TYPE 4 86
5.4 SUMMARY 88
CONCLUSIONS 89
6.1 CONCLUSIONS 89
6.2 FUTURE WORK 91
REFERENCE 92
VITA 95

Reference
[1] S. M. Sze, Physics of Semiconductor Devices, Wiley, 1981.
[2] Y. Kuo, Thin Film Transistors: Materials and Processes, vol. 1, Kluwer, 2004.
[3] Y. H. Tai, Design and Operation of TFT-LCD Panels, Wu-Nan Book, Inc., Apr. 2006.
[4] D. J. R. Cristaldi, S. Pennisi, F. Pulvirenti, “Liquid Crystal Display Drivers: Techniques and Circuits”, Springer, Mar. 2009.
[5] W. J. Nam, J. H. Lee, H. J. Lee, H.-S. Shin, and M.-K. Han, “Peripheral circuit designs using low-temperature p-type poly-Si thin-film transistors,” IEEE Journal of Display Technology, vol. 14, no. 4, pp. 403-409, 2006.
[6] T. C. Lu, H. W. Zan, M. D. Ker, “Temperature coefficient of poly-silicon TFT and its application on voltage reference circuit with temperature compensation in LTPS process,” IEEE Transaction on Electron Devices, vol. 55, no. 10, pp. 2583-2589, Oct. 2008.
[7] Y. H. Tai, C. C. Pai, B. T. Chen, and H. C. cheng, “A source-follower type analog buffer using poly-Si TFTs with large design windows,” IEEE Electron Device Letters, vol. 26, no. 11, pp. 811-813, Nov. 2005.
[8] Y. C. Tarn, P. C. Ku, H. H. Hsieh, and L. H. Lu, “An amorphous silicon operational amplifier and its application to 4 bit digital to analog converter,” IEEE Journal of Solid State Circuits, vol. 45, no. 5, pp. 1028-1035, May 2010.
[9] M. Powell, “The physics of amorphous-silicon thin-film transistors,” IEEE Transaction on Electron Devices, vol. 36, no. 12, pp. 2753-2763, Dec. 1989.
[10] [10] D. Allee, L. Clark, R. Shringarpure, S. Venugopal, Z. P. Li, and E. Bawolek, “Degradation effects in a-Si:H thin film transistors and their impact on circuit performance,” in Proc. IRPS, 2008, pp. 158-167.
[11] D. Allee, L. Clark, B. Vogt, R. Shringarpure, S. Venugopal, S. Uppili, K. Kaftanoglu, H. Shivalingaiah, Z. P. Li, J. Fernando, E. Bawolek, and S. O'Rourke, “Circuit-level impact of a-Si:H thin-film-transistor degradation on effects,” IEEE Transaction on Electron Devices, vol. 56, no. 6, pp. 1166-1176. Jun. 2009.
[12] H. Lebrun, F. Maurice, J. Magarino, and N. Szydlo, “AMLCD with integrated drivers made with amorphous-silicon TFTs,” SID Dig. Tech., 1995, pp. 403-406.
[13] F. Maurice, H. Lebrun, N. Szydlo, U. Rossini, and R. Chaudet, “High resolution projection valve with the amorphous silicon AMLCD technology,” in Proc. SPIE, 1998, pp. 92-99.
[14] R. I. A. Huq, and S. Weisbrod, “Phase clocked shift register with cross connecting between stages,” United States Patent 5434899 (Jul. 18, 1995).
[15] J. H. Oh, J. H. Hur, Y. D. Son, K. M. Kim, S. H. Kim, E. H. Kim, J. W. Choi, S. M. Hong, J. O. Kim, B. S. Bae, and J. Jang, “2.0 inch a-Si:H TFT-LCD with low noise integrated gate driver,” SID Dig. Tech., 2005, pp. 942-945.
[16] S. Y. Yoon, Y. H. Jang, B. Kim, M. D. Chun, H. N. Cho, N. W. Cho, C. Y. Sohn, S. H. Jo, C. D. Kim, and I. J. Chung, “Highly stable integrated gate driver circuit using a-Si TFT with dual pull-down structure,” SID Dig. Tech., 2006, pp. 348-351.
[17] S. Edo, M. Wakagi, and S. Komura, “A 2.2’’ QVGA a-Si TFT LCD with high reliability integrated gate driver,” SID Dig. Tech., 2006, pp. 1551-1552.
[18] J. W. Choi, J. I. Kim, S. H. Kim, and J. Jang, “Highly reliable amorphous silicon gate driver using stable center-offset thin-film transistors,” IEEE Transaction on Electron Devices, vol. 57, no. 9, pp. 2330-2334, Sep. 2010.
[19] N. Ibaraki, M. Kigoshi, K. Fukuda, and J. Kobayashi, “Threshold voltage instability of a-Si:H TFTs in liquid crystal displays,” Journal of Non-Crystalline Solids, vol. 115, no. 1-3, pp. 138-140. Dec. 1989.
[20] H. Cheng, C. Huang, J. Lin, and J. Kung, “The reliability of amorphous silicon thin film transistors for LCD under DC and AC stresses,” in Proc. Solid-State and Integrated Circuit Technology, 1998, pp. 834-837.
[21] Keithley Instruments, Inc. “Model 4200-SCS Semiconductor Characterization System User’s Manual,” no. 2896, Dec. 2007.
[22] C. L. Lin, C. D. Tu, C. E. Wu, C. C. Hung, K. J. Gan, and K. W. Chou, “Low-Power Gate Driver Circuit for TFT-LCD Application,” IEEE Transactions on Electron Devices, vol. 59, no. 5, pp. 1410-1415, Mar. 2012.
[23] C. W. Liao, C. H. He, T. Chen, D. Dai, S. Chung, T. S. Jen, and S. D. Zhang, “Implementation of an a-Si:H TFT Gate Driver Using a Five-Transistor Integrated Approach,” IEEE Transactions on Electron Devices vol. 59, no. 8, pp 2142-2148. Aug. 2012.
[24] C. W. Liao, Z. J. Hu, and D. Dai, S. Chung, T. S. Jen, and S. D. Zhang, “A Compact Bi-Direction Scannable a-Si:H TFT Gate Driver,” IEEE Display Technology Letters, vol. 11, no. 1, pp. 3-5, Jan. 2015.
[25] C. D. He, and C. W. Liao, “A new Integrated Gate Driver with Shift Register Circuits Employing 4 Clocks for 14.1-inch TFT-LCD” in Proc. Electrical and Control Engineering, June 2010, pp. 149-152.