臺灣博碩士論文加值系統

本論文主要設計高速四階脈波振幅調變(PAM-4)雷射二極體驅動器積體電路，可應用於光纖通訊系統中的發射端電路。
第一顆晶片採用台積電90-nm CMOS製程技術進行設計，電路設計包括等化器與負電容，以及時域訊號延遲處理的預增強電路，來提升電路操作頻寬，最後經由電流引導電路來產生四階脈波。量測可獲得25-Gb/s (12.5-Gbaud)的PAM-4輸出訊號，調變電流為2.8-mA，消耗功率為70.4-mW，晶片面積為0.538 x 0.6059 mm2。
第二顆晶片採用台積電90-nm CMOS製程技術進行設計，採用的等化器電路是由放大器和邊緣峰值產生器並接組成，運用與前一顆晶片不同的補償電路方式。量測結果最高操作速率可達40-Gb/s (20-Gbaud) PAM-4訊號，誤碼率低於10-12，調變電流為3.2-mA，消耗功率為57.2-mW，晶片面積為0.4987 x 0.4987 mm2。
第三顆晶片與第四顆晶片主要是設計DFB雷射或是MZ光調變器的驅動器電路，採用GaAs 0.15-μm pHEMT的製程技術進行電路設計。第三顆晶片為基本的差動電流引導電路；第四顆晶片則再加入預驅動放大器；經過模擬驗證，操作速率可以達到50-Gb/s NRZ或 100-Gb/s PAM-4；此兩顆晶片面積皆為1 x 1 mm2。

In this thesis, high-speed four-level pulse amplitude modulation (PAM-4) laser diode driver circuits were designed and applied to the transmitter in optical fiber communication systems.
The first chip was designed in TSMC 90nm CMOS technology. This circuit includes an equalizer, a negative capacitor, and a delay duty adjuster circuit (DDAC) which is used to achieve the pre-emphasis, to improve the circuit bandwidth. The PAM-4 signal can be generated by the current steering circuit. The chip can be operated at 25-Gb/s (12.5-Gbaud) PAM-4, the modulation current is 2.8-mA, the power consumption is 70.4-mW, and the chip size is 0.538 x 0.6059 mm2.
The second chip was designed in TSMC 90nm CMOS technology. The equalizer circuit is composed of an amplifier and an edge peak generator. According to the measurement results, the chip can be operated at 40-Gb/s (20-Gbaud) PAM-4, the bit error rate can below 10-12, and the modulation current is 3.2-mA. The power consumption of the chip is 57.2-mW and the chip size is 0.4987 x 0.4987 mm2.
The third and fourth chips were designed in GaAs 0.15-μm pHEMT process technology for driving DFB laser diodes or MZ optical modulators. The third chip is a basic current steering circuit, and the fourth chip has a pre-driver. Through the circuit simulations, the chips were verified to be operated at 50-Gb /s NRZ or 100-Gb/s PAM-4. The size of the both chips are 1 x 1 mm2 in size.

摘要 I
ABSTRACT III
致謝 IV
目錄 V
圖目錄 VII
表目錄 X
第一章 緒論 1
1.1前言 1
1.2研究動機 3
1.3文獻探討 5
1.4論文架構 8
第二章 光纖通訊發射端相關知識介紹 9
2.1 光纖通訊架構 9
2.2 光發射端光電元件介紹 10
2.3 調變技術與相關知識 13
2.3.1 訊號編碼型態 13
2.3.2 調變技術介紹 14
2.3.3 眼圖 17
2.3.4 抖動(Jitter) 18
2.4 設計IC流程 19
第三章 25-Gb/s PAM-4垂直腔面射型雷射二極體驅動電路設計 21
3.1 電路架構與分析 22
3.1.1 前置放大器(Pre-amplifier) 23
3.1.2 等化器電路 24
3.1.3 負電容電路 26
3.1.4 延遲週期調整電路(Delay Duty Adjuster Circuit) 27
3.1.5 電流引導電路 29
3.2 電路模擬 30
3.2.1 電路前模擬結果 30
3.2.2 電路後模擬結果 36
3.3 晶片量測結果 40
3.3.1 採鋁線打線量測之結果 42
3.3.2 採金線打線量測之結果 46
3.4 問題與討論 49
第四章 50-Gb/s PAM-4垂直腔面射型雷射二極體驅動電路 51
4.1 電路架構與分析 52
4.1.1 等化器 53
4.2 電路模擬 55
4.2.1 電路前模擬結果 57
4.2.2 電路後模擬結果 58
4.3 晶片量測結果 64
4.4 結果與討論 72
第五章 50-Gb/s NRZ雷射與光調變器驅動電路 73
5.1 GaAs 0.15-μm pHEMT 特性曲線 73
5.2 單級驅動電路 (第三顆晶片) 75
5.2.1 電路架構 75
5.2.2 電路前、後模擬 76
5.3 具等化器之驅動電路 (第四顆晶片) 79
5.3.1 電路架構 79
5.3.2 電路前、後模擬 80
第六章 結論 83
6.1 成果 83
6.2 未來工作 86
參考文獻 87

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